CVE-2025-20012

Incorrect behavior order for some Intel(R) Core™ Ultra Processors may allow an unauthenticated user to potentially enable information disclosure via physical access.

CVSS v3 4.9 MEDIUM

4.9^/10

CVSS v3 : MEDIUM

Vector :

Exploitability : 0.5 / Impact : 4.0

Attack Vector PHYSICAL

Attack Complexity HIGH

Privileges Required NONE

User Interaction NONE

Confidentiality Impact HIGH

Integrity Impact NONE

Availability Impact NONE

Scope CHANGED

References

Link	Resource
https://intel.com/content/www/us/en/security-center/advisory/intel-sa-01322.html
https://lists.debian.org/debian-lts-announce/2025/05/msg00021.html

Configurations

No configuration.

History

03 Nov 2025, 20:17

Type	Values Removed	Values Added
References		() https://lists.debian.org/debian-lts-announce/2025/05/msg00021.html -

16 May 2025, 14:43

Type	Values Removed	Values Added
Summary		(es) Un orden de comportamiento incorrecto para algunos Intel(R) Core™ Ultra Processors puede permitir que un usuario no autenticado potencialmente habilite la divulgación de información a través del acceso físico.

13 May 2025, 21:16

Type	Values Removed	Values Added
New CVE

Information

Published : 2025-05-13 21:16

Updated : 2025-11-03 20:17

NVD link : CVE-2025-20012

Mitre link : CVE-2025-20012

CVE.ORG link : CVE-2025-20012

JSON object : View

Products Affected

No product.

CWE

CWE-696

Incorrect Behavior Order

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