Improper Protection Against Voltage and Clock Glitches in FPGA devices, could allow an attacker with physical access to undervolt the platform resulting in a loss of confidentiality.
CVSS
No CVSS.
References
Configurations
No configuration.
History
15 Apr 2026, 00:35
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| Summary |
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24 Sep 2025, 22:15
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Information
Published : 2025-09-24 22:15
Updated : 2026-04-15 00:35
NVD link : CVE-2025-54520
Mitre link : CVE-2025-54520
CVE.ORG link : CVE-2025-54520
JSON object : View
Products Affected
No product.
CWE
CWE-1247
Improper Protection Against Voltage and Clock Glitches
