CVE-2023-46842

{"id": "CVE-2023-46842", "cveTags": [], "metrics": {"cvssMetricV31": [{"type": "Secondary", "source": "134c704f-9b21-4f2e-91b3-4a467353bcc0", "cvssData": {"scope": "CHANGED", "version": "3.1", "baseScore": 6.5, "attackVector": "LOCAL", "baseSeverity": "MEDIUM", "vectorString": "CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:N/I:N/A:H", "integrityImpact": "NONE", "userInteraction": "NONE", "attackComplexity": "LOW", "availabilityImpact": "HIGH", "privilegesRequired": "LOW", "confidentialityImpact": "NONE"}, "impactScore": 4.0, "exploitabilityScore": 2.0}]}, "published": "2024-05-16T14:15:08.317", "references": [{"url": "https://xenbits.xenproject.org/xsa/advisory-454.html", "source": "security@xen.org"}, {"url": "http://xenbits.xen.org/xsa/advisory-454.html", "source": "af854a3a-2127-422b-91ae-364da2661108"}, {"url": "https://xenbits.xenproject.org/xsa/advisory-454.html", "source": "af854a3a-2127-422b-91ae-364da2661108"}], "vulnStatus": "Awaiting Analysis", "weaknesses": [{"type": "Secondary", "source": "134c704f-9b21-4f2e-91b3-4a467353bcc0", "description": [{"lang": "en", "value": "CWE-843"}]}], "descriptions": [{"lang": "en", "value": "Unlike 32-bit PV guests, HVM guests may switch freely between 64-bit and\nother modes. This in particular means that they may set registers used\nto pass 32-bit-mode hypercall arguments to values outside of the range\n32-bit code would be able to set them to.\n\nWhen processing of hypercalls takes a considerable amount of time,\nthe hypervisor may choose to invoke a hypercall continuation. Doing so\ninvolves putting (perhaps updated) hypercall arguments in respective\nregisters. For guests not running in 64-bit mode this further involves\na certain amount of translation of the values.\n\nUnfortunately internal sanity checking of these translated values\nassumes high halves of registers to always be clear when invoking a\nhypercall. When this is found not to be the case, it triggers a\nconsistency check in the hypervisor and causes a crash.\n"}, {"lang": "es", "value": "A diferencia de los hu\u00e9spedes PV de 32 bits, los hu\u00e9spedes HVM pueden cambiar libremente entre 64 bits y otros modos. Esto significa en particular que pueden configurar los registros utilizados para pasar argumentos de hiperllamada en modo de 32 bits a valores fuera del rango en el que el c\u00f3digo de 32 bits podr\u00eda configurarlos. Cuando el procesamiento de hiperllamadas toma una cantidad considerable de tiempo, el hipervisor puede optar por invocar una continuaci\u00f3n de hiperllamada. Hacerlo implica colocar argumentos de hiperllamada (quiz\u00e1s actualizados) en los registros respectivos. Para los hu\u00e9spedes que no se ejecutan en modo de 64 bits, esto implica adem\u00e1s una cierta cantidad de traducci\u00f3n de los valores. Desafortunadamente, la comprobaci\u00f3n de cordura interna de estos valores traducidos supone que las mitades altas de los registros siempre est\u00e1n limpias al invocar una hiperllamada. Cuando se descubre que este no es el caso, se activa una comprobaci\u00f3n de coherencia en el hipervisor y se produce un bloqueo."}], "lastModified": "2025-04-30T23:15:59.920", "sourceIdentifier": "security@xen.org"}