Improperly preserved integrity of hardware configuration state during a power save/restore operation in the AMD Secure Processor (ASP) could allow an attacker with the ability to write outside the trusted memory range (TMR) to change the execution flow of the Video Core Next (VCN) firmware potentially impacting confidentiality, integrity, or availability.
CVSS
No CVSS.
References
Configurations
No configuration.
History
15 May 2026, 03:16
| Type | Values Removed | Values Added |
|---|---|---|
| New CVE |
Information
Published : 2026-05-15 03:16
Updated : 2026-06-17 05:56
NVD link : CVE-2023-31316
Mitre link : CVE-2023-31316
CVE.ORG link : CVE-2023-31316
JSON object : View
Products Affected
No product.
CWE
CWE-1304
Improperly Preserved Integrity of Hardware Configuration State During a Power Save/Restore Operation
